Computing VLSI

VLSI } 015 } Static Timing Analysis

This lecture discuss static timing analysis concepts. What are different paths, different kinds of checks, e.g. max type, min type timing analysis tool like prime time from synopsys does. How the setup and hold checks are performed, how to analyzed the timing report, how to fix the setup and hold violations are discussed. The need for virtual clocks, multi-cycle paths, false paths are discussed.

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