Tag: chip placement

VLSI } 013 } Floor-planning tips }

Post author By LEPROF
Post date 21st July 2017
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This lecture discusses some of the SoC floor-planning challenges and tips. A good floor-plan is the key to quality placement results. These are NP-hard problems which EDA tool have to deal with. A good initial floor-plan can save lot of physical design issues later in the design phase. It is very important to have a […]

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Tags chip placement

Computing VLSI

VLSI } 003 } SoC design using cores and mixed-signal design aspects }

Post author By LEPROF
Post date 8th October 2015
No Comments on VLSI } 003 } SoC design using cores and mixed-signal design aspects }

Practical concerns about system-on-a-chip design with respect to mixed-signal cores are discussed. It is difficult to design a mixed-signal IP core which works in silicon. Mixed signal design integrates two different kind of mind sets: digital and analog. In one world there is no concept of clock and other is totally dependent on clock signal. […]

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Tags analog design, chip placement, digital design, mixed-signal, registers, SoC