# VLSI } 012 } Metastability }

This lecture discusses concept of metastability. Synchronous designs suffer from this inherent problem associated with flip-flops, latches in the design. How to conceptualize metastability. Water flow analogy is very helpful when designing circuits at transistors level. What is MTBF (mean time between failures) and how we can develop MTBF equation. What are different recommendations for circuit design and what can we do with metastability. This lecture covers basic concepts which are very helpful when designing reliable circuits. Sometimes I say electron flow for both nmos and pmos, do not confuse it, consider it as charge carrier flow, pmos will have holes and nmos will have electron. Time parameters tp and tn in inverter example, which signifies the time it takes to accumulate potential or discharge potential, are mainly due to device geometry and charge carrier mobility (holes and electron) under all other condition remain same.

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Leprofesseur }Post authorNOTE: There is a mistake in case2 example of MTBF calculation,

(@ 29.10), the formula is correct, actually the case 2, instead of changing the resolution time, i made a mistake and did not pay attention, in case 2, if we use synchronizer to use a divide-by-2 clock, resolution time tr would be different (more) than in case one, e.g.

tr = 2 x (1/fclk) – set up and propagation delay

case 1: tr = 1 x (1000000/800) – 400ps = 850 ps

case 2: tr = 2 x (1000000/800) – 400ps = 2100 ps

now if we put these values in formula, it should make sense, essentially learning point here is that slowing down the clock would make MTBF exponentially large!!