VLSI } 005 } State Machines }
This lecture discusses a fundamental and an important topic in digital circuit design – state machines. Mealy and Moore variants of sequential state machine are discussed with examples. How to synthesize state machine circuit from state graphs, state transition tables using Boolean equations and Karnaugh map is discussed. A verilog example for synthesizable Moore and Mealy machine is also discussed.
5,418 total views, 2 views today