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Computing VLSI

⨘ } VLSI } 017 } CMOS Power Consumption }

CMOS power and energy concepts, power analysis during chip design flow is discussed. AC and DC power are discussed. Different power components of PMOS and NMOS dynamic and static power are discussed. Static and Dynamic power equations are discussed. A brief overview of Apache Power Artist EDA power analysis tool is discussed.

Dynamic power in circuits could be optimized using various RTL design techniques, e.g. clock gating, power controller logic. Static power on the other hand is technology dependent and very little can be done to optimize except reducing wire capacitance with some physical design power optimization techniques. Typically physical design tool do a good job however they need to be guided by human.

LEPROF/1LEPROF/LEPROFESSEUR

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